Rockfish Technology offers the industry's most advanced Ethernet (Bus Functional Models) BFMs supporting the following speeds and protocols:
The Ethernet BFMs provide the error injection, exhaustive protocol checking, and fine grain control of the test stimulus that the advanced Verification environment would require. In addition, cycle by cycle modeling of the receive path state machines are included to ensure the state diagrams of the IEEE specification are implemented precisely. This allows exact checking of the receive GMII and XGMII busses. Functional coverage of these state machines is built in as well to close the loop. This exact modeling of the state machines in concert with the functional coverage monitors virtually eliminates the need for directed testing of the PCS receive datapath.
In addition, the Ethernet BFMs are user friendly. They are written exclusively in Verilog and thereby offer portability to any environement compatable with Verilog. The well documented simple clocked data interfaces and line loopback configuration provide an ease of integration into an existing testbench.
To further accelerate your project, Rockfish Technology can offer the Ethernet BFMs integrated with the System Verilog Core Testbench offering and deliver a complete solution. This complete solution can be tailored to model and check the MAC counters as well as offer fine grained packet control to test higher level packet parsing.
10/100/1000 SGMII & 1000BaseX User Guide